Cross-development tools in GNUPro Toolkit normally have names that reflect the target processor and the object file format output by the tools (for example, ELF). This makes it possible to install more than one set of tools in the same binary directory, including both native and cross-development tools.
The complete tool name is a four-part hyphenated string.
For example, the GCC compiler for the Toshiba TX39 is mips-tx39-elf-gcc.
The first part indicates the processor family (mips).
The second part indicates the processor (tx39).
The third part indicates the file format output by the tool (elf).
The fourth part is the generic tool name (gcc).
The binaries for a Windows 95/NT hosted toolchain are installed with an .exe suffix. However, the .exe suffix does not need to be specified when running the executable.
The TX39 package includes the following supported tools.
|
Tool description
|
Tool name
|
|
GCC compiler
|
mips-tx39-elf-gcc
|
|
C++ compiler
|
mips-tx39-elf-c++
|
|
GAS assembler
|
mips-tx39-elf-as
|
|
GNU linker
|
mips-tx39-elf-ld
|
|
Standalone simulator
|
mips-tx39-elf-run
|
|
Binary utilities
|
mips-tx39-elf-ar
mips-tx39-elf-nm
mips-tx39-elf-objcopy mips-tx39-elf-objdump mips-tx39-elf-ranlib mips-tx39-elf-size mips-tx39-elf-strings mips-tx39-elf-strip |
|
GDB debugger
|
mips-tx39-elf-gdb
|
|
Host
|
Vendor
|
|
SunOS 4.1.4 (SPARC)
|
Sun
|
|
Solaris 2.4-2.5.1 (SPARC)
|
Sun
|
|
Windows NT (x86)
|
Microsoft
|
|
Windows 95 (x86)
|
Microsoft
|
-EB
|
Type
|
Size (bytes)
|
Alignment (bytes)
|
|
char :
|
1 byte
|
1 byte
|
|
short :
|
2 bytes
|
2 bytes
|
|
int :
|
4 bytes
|
4 bytes
|
|
unsigned :
|
4 bytes
|
4 bytes
|
|
long :
|
4 bytes
|
4 bytes
|
|
long long :
|
8 bytes
|
8 bytes
|
|
float :
|
4 bytes
|
4 bytes
|
|
double :
|
8 bytes
|
8 bytes
|
|
pointer :
|
4 bytes
|
4 bytes
|
The following documentation describes the calling conventions for subroutine calls: parameter registers for passing parameters and other register usage.
|
Parameter registers
|
|
|
general-purpose
|
r4 through r11
|
|
floating point
|
f12 through f19
|
|
Register usage
|
|
|
fixed 0 value
|
r0
|
|
volatile
|
r1 through r15, as
well as r24 and r25
|
|
non-volatile
|
r16 through r23,
as well as r30
|
|
kernel reserved
|
r26, r27
|
|
gp (SDA base)
|
r28
|
|
stack pointer
|
r29
|
|
frame pointer
|
r30 (if needed)
|
|
return address
|
r31
|
The following documentation describes the TX39 stack frame.
Consider the parameters in a function call as ordered from left (first parameter) to right. In the following algorithm, FR contains the number of the next available floating-point register (or register pair for modes in which floating-point registers hold only 32 bits). GR contains the number of the next available general-purpose register. STARG is the address of the next available stack parameter word.
Code that passes structures and unions by value is implemented specially. ("struct" will refer to structs and unions, inclusively.) Structs small enough to fit in a register are passed by value in a single register or in a stack frame slot the size of a register. Larger structs are handled by passing the address of the structure. In this case, a copy of the structure will be made if necessary in order to preserve the pass-by-value semantics. Copies of large structs are made under the following rules.
|
|
ANSI mode
|
K&R mode
|
|
Normal param
|
Callee copies if needed
|
Caller copies
|
|
Varargs (...) param
|
Caller copies
|
Caller copies
|
No special changes are needed for handling varargs parameters other than the caller knowing that a copy is needed on struct parameters larger than a register (see Structure passing for TX39 targets).
The varargs macros set up a two-part register save area, one part for the general-purpose registers and one part for floating-point registers, and maintain separate pointers for these two areas and for the stack parameter area. The register save area lies between the caller and callee stack frame areas.
In the case of software floating-point, only the general-purpose
registers need to be saved.
Because the save area lies between the two stack frames,
the saved register parameters are contiguous with parameters passed on
the stack. This allows the varargs macros to be much simpler. Only one
pointer is needed, advancing from the register save area into the callers
stack frame.
Data types and register usage use the following return values.
|
Data type
|
Register
|
|
int :
|
r2
|
|
short :
|
r2
|
|
long :
|
r2
|
|
long long :
|
r2 through r3 (32-bit
mode)
|
|
float :
|
f0
|
|
double :
|
f0 through f1 (32-bit
mode)
|
|
struct/union :
|
(see following
discussion)
|
Assembler issues for TX39 targets
For information about the MIPS instruction set, see MIPS RISC Architecture, (Kane and Heindrich, Prentice-Hall). For an overview of MIPS assembly conventions, see "Appendix D: Assembly Language Programming" in MIPS RISC Architecture.
Register names for TX39 targets
There are 32 64-bit general (integer) registers, named $0 through $31. There are 32 64-bit floating-point registers, named $f0 through $f31.
The symbols, $0 through $31, refer to the general-purpose registers.
|
$at
|
$1
|
|
$kt0
|
$26
|
|
$kt1
|
$27
|
|
$gp
|
$28
|
|
$sp
|
$29
|
|
$fp
|
$30
|
Assembler directives for TX39 targets
The following list shows the TX39 assembler directives.
|
.abicalls
|
.dcb.b
|
.fail
|
.irepc
|
.psize
|
|
.abort
|
.dcb.d
|
.file
|
.irp
|
.purgem
|
|
.aent
|
.dcb.l
|
.fill
|
.irpc
|
.quad
|
|
.align
|
.dcb.s
|
.float
|
.lcomm
|
.rdata
|
|
.appfile
|
.dcb.w
|
.fmask
|
.lflags
|
.rep
|
|
.appline
|
.dcb.x
|
.format
|
.linkonce
|
.rept
|
|
.ascii
|
.debug
|
.frame
|
.list
|
.rva
|
|
.asciiz
|
.double
|
.global
|
.livereg
|
.sbttl
|
|
.asciz
|
.ds
|
.globl
|
.llen
|
.sdata
|
|
.balign
|
.ds.b
|
.gpword
|
.loc
|
.set
|
|
.balignl
|
.ds.d
|
.half
|
.long
|
.short
|
|
.balignw
|
.ds.l
|
.hword
|
.lsym
|
.single
|
|
.bgnb
|
.ds.p
|
.if
|
.macro
|
.skip
|
|
.bss
|
.ds.s
|
.ifc
|
.mask
|
.space
|
|
.byte
|
.ds.w
|
.ifdef
|
.mexit
|
.spc
|
|
.comm
|
.ds.x
|
.ifeq
|
.mri
|
.stabd
|
|
.common
|
.dword
|
.ifeqs
|
.name
|
.stabn
|
|
.common.s
|
.eject
|
.ifge
|
.noformat
|
.stabs
|
|
.cpadd
|
.else
|
.ifgt
|
.nolist
|
.string
|
|
.cpload
|
.elsec
|
.ifle
|
.nopage
|
.struct
|
|
.cprestore
|
.end
|
.iflt
|
.octa
|
.text
|
|
.data
|
.endb
|
.ifnc
|
.offset
|
.title
|
|
.dc
|
.endc
|
.ifndef
|
.option
|
.ttl
|
|
.dc.b
|
.endif
|
.ifne
|
.org
|
.verstamp
|
|
.dc.d
|
.ent
|
.ifnes
|
.p2align
|
.word
|
|
.dc.l
|
.equ
|
.ifnotdef
|
.p2alignl
|
.xcom
|
|
.dc.s
|
.equiv
|
.include
|
.p2alignw
|
.xdef
|
|
.dc.w
|
.err
|
.insn
|
.page
|
.xref
|
|
.dc.x
|
.exitm
|
.int
|
.plen
|
.xstabs
|
|
.dcb
|
.extern
|
.irep
|
.print
|
.zero
|
MIPS
synthetic instructions supported for the TX39
The TX39 GAS assembler supports the typical MIPS synthetic instructions (macros). What follows is a list of synthetic instructions supported by the assembler, as well as an example expansion of each instruction. The following helps to follow the list of instructions.
|
abs R R
|
bgez $a0,0x5c
move $t1,$a0
neg $t1,$a0 |
|
div R R R
|
div $zero,$t1,$a0
bnez $a0,0x120
nop break 0x7 li $at,-1 bne $a0,$at,0x138 lui $at,0x8000 bne $t1,$at,0x138 nop break 0x6 mflo $a3 |
|
div R R
|
div $zero,$a3,$t1
bnez $t1,0x154
nop break 0x7 li $at,-1 bne $t1,$at,0x16c lui $at,0x8000 bne $a3,$at,0x16c nop break 0x6 mflo $a3 |
|
div R R I
|
li
$at,<I>
div $zero,$a3,$at
mflo $a1 |
|
divu R R R
|
divu $zero,$a0,$a2
bnez $a2,0x1cc
nop break 0x7 mflo $t1 |
|
divu R R
|
divu $zero,$t1,$a0
bnez $a0,0x1e8
nop break 0x7 mflo $t1 |
|
divu R R I
|
li
$at,<I>
divu $zero,$v1,$at
mflo $t0 |
|
jal E
|
jalr <E>
|
|
lwc0 R I
|
ll
<R> <I>
|
|
mul R R R
|
multu $t0,$v1
mflo $a2 |
|
mul R R I
|
li
$at,<I>
mult $t0,$at
mflo $a2 |
|
mulo R R R
|
mult $t0,$v1
mflo $a2
sra $a2,$a2,0x1f mfhi $at beq $a2,$at,0x440 nop break 0x6 mflo $a2 |
|
mulou R R R
|
multu $t0,$v1
mfhi $at
mflo $a2 beqz $at,0x464 nop break 0x6 |
|
nor R R I
|
ori $t1,$a0,0xe
nor $t1,$t1,$zero |
|
not R R
|
nor $t1,$a0,$zero
|
|
or R R I
|
ori $a2,$t0,<I>
|
|
rem R R R
|
div $zero,$t1,$a0
bnez $a0,0x4ec
nop break 0x7 li $at,-1 bne $a0,$at,0x504 lui $at,0x8000 bne $t1,$at,0x504 nop break 0x6 mfhi $a3 |
|
rem R R I
|
li
$at,11
div $zero,$t1,$at
mfhi $a3 |
|
remu R R R
|
divu $zero,$v1,$a1
bnez $a1,0x564
nop break 0x7 mfhi $t0 |
|
remu R R I
|
li
$at,<I>
divu $zero,$a0,$at
mfhi $t1 |
|
rol R R R
|
negu $at,$a3
srlv $at,$a1,$at
sllv $v1,$a1,$a3 or $v1,$v1,$at |
|
rol R R I
|
sll $at,$v1,<I>
srl $t0,$v1,0x11
or $t0,$t0,$at |
|
ror R R R
|
negu $at,$a1
sllv $at,$v1,$at
srlv $t0,$v1,$a1 or $t0,$t0,$at |
|
ror R R I
|
srl $at,$t0,<I>
sll $a2,$t0,0x11
or $a2,$a2,$at |
|
sd R E
|
sw
$a1,<E>
sw $a2,<E+4> |
|
seq R R R
|
xor $t1,$a0,$a2
sltiu $t1,$t1,1 |
|
seq R R I
|
xori $a3,$t1,<I>
sltiu $a3,$a3,1 |
|
sge R R R
|
slt $a3,$t1,$a0
xori $a3,$a3,0x1 |
|
sge R R I
|
slti $a1,$a3,<I>
xori $a1,$a1,0x1 |
|
sgeu R R R
|
sltu $a1,$a3,$t1
xori $a1,$a1,0x1 |
|
sgeu R R I
|
sltiu $a0,$a2,<I>
xori $a0,$a0,0x1 |
|
sgt R R R
|
slt $a1,$t1,$a3
|
|
sgt R R I
|
li
$at,<I>
slt $v1,$at,$a1 |
|
sgtu R R R
|
sltu $v1,$a3,$a1
|
|
sgtu R R I
|
li
$at,<I>
sltu $t1,$at,$a0 |
|
sle R R R
|
slt $v1,$a3,$a1
xori $v1,$v1,0x1 |
|
sle R R I
|
li
$at,<I>
slt $t0,$at,$v1
xori $t0,$t0,0x1 |
|
sleu R R R
|
sltu $t0,$a1,$v1
xori $t0,$t0,0x1 |
|
sleu R R I
|
li
$at,<I>
sltu $a3,$at,$t1
xori $a3,$a3,0x1 |
|
sll R R R
|
sllv $t0,$v1,$a1
|
|
slt R R I
|
slti $a3,$t1,<I>
|
|
sltu R R I
|
sltiu $a3,$t1,<I>
|
|
sne R R R
|
xor $a1,$a3,$t1
sltu $a1,$zero,$a1 |
|
sne R R I
|
xori $v1,$a1,<I>
sltu $v1,$zero,$v1 |
|
sra R R R
|
srav $a0,$a2,$t0
|
|
srl R R R
|
srlv $v1,$a1,$a3
|
|
sub R R I
|
addi $a0,$a2,-<I>
|
|
subu R R I
|
addiu $t1,$a0,-<I>
|
|
swc0 R E
|
sc
$a1,<E>
|
|
ulh R E
|
lb
$a0,<E>
lbu $at,<E+1>
sll $a0,$a0,0x8 or $a0,$a0,$at |
|
ulhu R E
|
lbu $a0,<E>
lbu $at,<E+1>
sll $a0,$a0,0x8 or $a0,$a0,$at |
|
ulw R E
|
lwl $a2,<E>
lwr $a2,<E+K> |
|
ush R E
|
sb
$a2,<E+K>
srl $at,$a2,0x8
sb $at,<E> |
|
usw R E
|
swl $a2,<E>
swr $a2,<E+K> |
|
xor R R I
|
xori $a2,$t0,0x10
|
Linker issues for TX39 targets
For a list of available generic linker options, see Linker scripts in Using ld in GNUPro Utilities. There are no TX39-specific command-line linker options.
Linker script for TX39 targets
The following linker script is dve.ld, a linker script for the Densan DVE-R3900/A20 board.
/* Linker script for Densan DVE-R3900/20A board */ ENTRY(_start) OUTPUT_ARCH("mips:3000")
OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-littlemips")
GROUP(-lc -ldve -lgcc) SEARCH_DIR(.) __DYNAMIC = 0; /* * Allocate the stack to be at the top of memory, since the * stack grows down */ PROVIDE (__stack = 0); /* PROVIDE (__global = 0); */ /* * Initalize some symbols to be zero so we can reference them * in the crt0 without core dumping. These functions are all * optional, but we do this so we can have our crt0 always use * them if they exist. * This is so BSPs work better when using the crt0 installed * with gcc. * We have to initalize them twice, so we multiple object file * formats, as some prepend an underscore. */ PROVIDE (hardware_init_hook = 0); PROVIDE (software_init_hook = 0); SECTIONS {
. = 0xA0040000; .text : {
_ftext = . ; *(.init) eprol = .; *(.text) *(.mips16.fn.*) *(.mips16.call.*) PROVIDE (__runtime_reloc_start = .); *(.rel.sdata) PROVIDE (__runtime_reloc_stop = .); *(.fini) etext = .; _etext = .; } . = .; .rdata : {
*(.rdata) } _fdata = ALIGN(16); .data : {
*(.data) CONSTRUCTORS } . = ALIGN(8); _gp = . + 0x8000; __global = _gp; .lit8 : {
*(.lit8) } .lit4 : {
*(.lit4) } .sdata : {
*(.sdata) } . = ALIGN(4); edata = .; _edata = .; _fbss = .; .sbss : {
*(.sbss) *(.scommon) } .bss : {
_bss_start = . ; *(.bss) *(COMMON) } end = .; _end = .; /* DWARF debug sections. Symbols in the DWARF debugging sections are relative to the beginning of the section so we begin them at 0. */ /* DWARF 1 */ .debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */ .debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */ .debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */ .debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */ .debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
} |
Debugger issues for TX39 targets
(gdb) target r3900 205.180.230.151:1600
(gdb) target r3900 205.180.230.151:1600
(gdb) target r3900 tx39a:1600
Simulator issues for TX39 targets
|
Usage: run [options] program [program args]
Options: -l FILE, --log FILELog file -n MODEL, --name MODELSelect arch model -p[on|off], --profile [on|off] Enable profiling -t[on|off], --trace [on|off] Enable tracing -z FILE, --tracefile FILEWrite trace to file -y FREQ, --frequency FREQProfile frequency -y SIZE, --samples SIZE Profile sample size |
% tx39-elf-run --trace hello
Hello, world!
3 + 4 = 7
|
2 a0040008 ; width 4 ; load instruction
2 a004000c ; width 4 ; load instruction 2 a0040010 ; width 4 ; load instruction 2 a0040014 ; width 4 ; load instruction 2 a0040018 ; width 4 ; load instruction 2 a004001c ; width 4 ; load instruction 2 a0040020 ; width 4 ; load instruction 2 a0040024 ; width 4 ; load instruction 2 a0040028 ; width 4 ; load instruction |
% mips-tx39-elf-run --trace --tracefile=trace.out hello
Placing trace information into file "trace.out"
Hello, world!
3 + 4 = 7
--profile [on|off]
% mips-tx39-elf-run --trace hello
Hello, world!
3 + 4 = 7
--frequency <frequency>
% mips-tx39-elf-run --profile --frequency 128 hello
Hello, world!
3 + 4 = 7
--samples <size>
The simulator rounds the sample size up the next power of two.
% mips-tx39-elf-run --profile --samples 20000 hello
Hello, world!
3 + 4 = 7
|
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