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SPARC dependent features See the following documentation for this architecture’s features and options for the assembler. The SPARC chip family includes several successive levels (or other variants) of chip, using the same core instruction set, but including a few additional instructions at each level. By default, as assumes the core instruction set (SPARC v6), but “bumps” the architecture level as needed; it switches to successively higher architectures as it encounters instructions that only exist in the higher levels. If not configured for SPARC v9 (sparc64-*-*), as will not bump passed sparclite by default, an option must be passed to enable the v9 instructions. as treats sparclite as being compatible with v8, unless an architecture is explicitly requested. SPARC v9 is always incompatible with sparclite.
-xarch=v8plus | -xarch=v8plusa
-bump
The SPARC uses IEEE floating-point numbers. The SPARC version of as supports the following additional machine directives.
.common
.half
.proc
.reserve
.seg
.skip
.word
.xword
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